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It is a course which will enable you to design many new product developments using FPGA system including autonomous vehicles, secured data centres and cloud computing robotics, home automation and video surveillance as well as smart medical diagnostics.
FPGA is now also replacing Asics in applications for their flexibility over Asics. This system provides quick development to products with a much lesser cost also. It is the foundation course for FPGA embedded systems.
Assessment
This course does not involve any written exams. Students need to answer 5 assignment questions to complete the course, the answers will be in the form of written work in pdf or word. Students can write the answers in their own time. Each answer needs to be 200 words (1 Page). Once the answers are submitted, the tutor will check and assess the work.
Certification
Edukite courses are free to study. To successfully complete a course you must submit all the assignment of the course as part of the assessment. Upon successful completion of a course, you can choose to make your achievement formal by obtaining your Certificate at a cost of £49.
Having an Official Edukite Certification is a great way to celebrate and share your success. You can:
- Add the certificate to your CV or resume and brighten up your career
- Show it to prove your success
Course Curriculum
| Module 01 | |||
| FPGA Design for Embedded Systems – Course Overview | 00:07:00 | ||
| Programmable logic and FPGA design | 00:02:00 | ||
| A Brief History of Programmable Logic | 00:10:00 | ||
| CPLD Architecture | 00:05:00 | ||
| LUTs and FPGA Architecture | 00:09:00 | ||
| LUTs for Logic Design | 00:03:00 | ||
| FPGA Design for Embedded Systems – Designing Adders | 00:06:00 | ||
| FPGA Design for Embedded Systems – Designing Multipliers | 00:04:00 | ||
| FPGA Design Flow | 00:05:00 | ||
| Module 02 | |||
| Downloading Quartus Prime | 00:03:00 | ||
| Installing Quartus Prime | 00:03:00 | ||
| Introducing Quartus Prime | 00:11:00 | ||
| Create a design project in Quartus Prime | 00:08:00 | ||
| Create a design in Quartus Prime | 00:14:00 | ||
| Compile a Design | 00:18:00 | ||
| View the RTL | 00:17:00 | ||
| Timing Analysis with Time Quest I | 00:10:00 | ||
| Timing Analysis with Time Quest II | 00:17:00 | ||
| Simulate a design with ModelSim | 00:18:00 | ||
| Many types of FPGAs | 00:05:00 | ||
| Module 03 | |||
| Xilinx CPLD Architecture | 00:07:00 | ||
| Xilinx Small FPGAs | 00:09:00 | ||
| Xilinx Large FPGAs | 00:12:00 | ||
| Altera CPLDs and Small FPGAs | 00:08:00 | ||
| Altera Large FPGAs | 00:10:00 | ||
| Microsemi Single chip FPGA solutions | 00:14:00 | ||
| Lattice Single Chip FPGA solutions | 00:15:00 | ||
| FPGA Design Expertise | 00:05:00 | ||
| Module 04 | |||
| Advanced Schematic Entry for FPGA Design Drawing and Hierarchy | 00:27:00 | ||
| Improving Productivity with IP Blocks | 00:25:00 | ||
| Improving Timing with Pipelining | 00:18:00 | ||
| FPGA IO Getting In and Getting Out | 00:09:00 | ||
| Pin Assignments Making them Spot On! | 00:21:00 | ||
| Programming the FPGA | 00:10:00 | ||
| Becoming one with Q Qsys System Design | 00:21:00 | ||
| Becoming one with Q Part II Qsys System Design Finishing Touches | 00:26:00 | ||
| Becoming one with Q Part III Qsys System Design Finishing Touches | 00:19:00 | ||
| Assessment | |||
| Submit Your Assignment | 00:00:00 | ||
| Certification | 00:00:00 | ||
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